Multimedia Solutions Company
Copyright 2014 Atria Logic Inc.
The AL-H264D-CTRL core is a feature rich RTL implementation of H.264/AVC Baseline
Profile Decoder algorithm for high quality multimedia services on limited bandwidth
network. The core processes video bitstream from external memory such as SRAM or
DDR1/2 and writes decoded frames back to external memory. It supports video resolutions
from SQCIF to HD.
The AL-H264D-REFD reference design is System-on-Chip (SoC) implementation of
H.264/AVC Baseline Profile Decoder with an ARM Cortex-M1 or an Altera NIOS embedded
processor along with peripheral logic. This reference design is implemented on Altera
Cyclone-III FPGA development board.
The AL-H264E-SW Video Encoder is H.264 Baseline Profile implementation for Mobile Platforms.
The software IP is optimized with innovative and efficient algorithms that Atria Logic has developed
for low-power and high efficiency mobile applications. The implementation is highly efficient in terms
of speed and memory footprint. The IP creates high quality streams at low bit-rates.
The AL-MPEG2E-SW Video Encoder is MPEG-2 part 2 Main Profile implementation for Mobile
Platforms. The software IP is optimized with innovative and efficient algorithms that Atria Logic has
developed for low-power and high efficiency mobile applications. The implementation is highly efficient
in terms of speed and memory footprint. The IP creates high quality streams at low bit-rates.